Module cranelift_codegen::isa[−][src]

Instruction Set Architectures.

The isa module provides a TargetIsa trait which provides the behavior specialization needed by the ISA-independent code generator. The sub-modules of this module provide definitions for the instruction sets that Cranelift can target. Each sub-module has it’s own implementation of TargetIsa.

Constructing a `TargetIsa` instance

The target ISA is built from the following information:

The name of the target ISA as a string. Cranelift is a cross-compiler, so the ISA to target can be selected dynamically. Individual ISAs can be left out when Cranelift is compiled, so a string is used to identify the proper sub-module.
Values for settings that apply to all ISAs. This is represented by a settings::Flags instance.
Values for ISA-specific settings.

The isa::lookup() function is the main entry point which returns an isa::Builder appropriate for the requested ISA:

use cranelift_codegen::isa;
use cranelift_codegen::settings::{self, Configurable};
use std::str::FromStr;
use target_lexicon::Triple;

let shared_builder = settings::builder();
let shared_flags = settings::Flags::new(shared_builder);

match isa::lookup(triple!("riscv32")) {
    Err(_) => {
        // The RISC-V target ISA is not available.
    }
    Ok(mut isa_builder) => {
        isa_builder.set("supports_m", "on");
        let isa = isa_builder.finish(shared_flags);
    }
}

The configured target ISA trait object is a Box<TargetIsa> which can be used for multiple concurrent function compilations.

Re-exports

pub use crate::isa::registers::regs_overlap;

pub use crate::isa::registers::RegClass;

pub use crate::isa::registers::RegClassIndex;

pub use crate::isa::registers::RegInfo;

pub use crate::isa::registers::RegUnit;

Modules

registers	Data structures describing the registers in an ISA.
unwind	Represents information relating to function unwinding.

Structs

BranchRange	Constraints on the range of a branch instruction.
Builder	Builder for a `TargetIsa`. Modify the ISA-specific settings before creating the `TargetIsa` trait object with `finish`.
EncInfo	Information about all the encodings in this ISA.
Encoding	Bits needed to encode an instruction as binary machine code.
Encodings	An iterator over legal encodings for the instruction.
OperandConstraint	Register constraint for a single value operand or instruction result.
RecipeConstraints	Value operand constraints for an encoding recipe.
StackBaseMask	Bit mask of supported stack bases.
StackRef	A method for referencing a stack slot in the current stack frame.
TargetFrontendConfig	This struct provides information that a frontend may need to know about a target to produce Cranelift IR for the target.

Enums

BackendVariant	The “variant” for a given target. On one platform (x86-64), we have two backends, the “old” and “new” one; the new one is the default if included in the build configuration and not otherwise specified.
CallConv	Calling convention identifiers.
ConstraintKind	The different kinds of operand constraints.
LookupError	Describes reason for target lookup failure
StackBase	Generic base register for referencing stack slots.

Traits

TargetIsa

Methods that are specialized to a target ISA. Implies a Display trait that shows the shared flags, as well as any isa-specific flags.

Functions

base_size	Returns the base size of the Recipe, assuming it’s fixed. This is the default for most encodings; others can be variable and longer than this base size, depending on the registers they’re using and use a different function, specific per platform.
lookup	Look for an ISA for the given `triple`. Return a builder that can create a corresponding `TargetIsa`.
lookup_by_name	Look for a supported ISA with the given `name`. Return a builder that can create a corresponding `TargetIsa`.
lookup_variant	Look for an ISA for the given `triple`, selecting the backend variant given by `variant` if available.

Type Definitions

Legalize

After determining that an instruction doesn’t have an encoding, how should we proceed to legalize it?